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Procedure / function calling

Place parameters in registers a0 to a7
Transfer control to procedure (jal ra, Proc)
Acquire storage for procedure (addi sp, sp, -…)
Perform procedure's operations
Place result in register a0 for caller
Free storage of procedure (addi sp, sp, +…)
Return to place of call (jalr zero, 0(ra))

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Annotation 7657113652492

#has-images

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3 types of cache misses (3 Cs)

Compulsory miss
Capacity miss
Conflict miss

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Annotation 7657686961420

member access operator .

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Variable declaration of a struct struct point a; Variable declaration with initialization struct point b= {1, 2}; Access to members through member access operator . struct point p; p.x= 1; p.y= 2;

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Flashcard 7657711340812

Question

Number of clock cycles for program depends on:

Number of instructions executed (instruction count)
- Determined by ISA and compiler
[...]
- Determined by CPU hardware

Answer

Average number of clock cycles per instruction (CPI)

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From clock cycles to instruction count and CPI Number of clock cycles for program depends on: Number of instructions executed (instruction count) Determined by ISA and compiler Average number of clock cycles per instruction (CPI) Determined by CPU hardware Usually, different instructions have different CPI CPI of a program (code sequence) depends on instructions executed (instruction mix)

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Flashcard 7657723923724

Question

Passing arrays as parameters

Pass [...] of first array element

#include <stdio.h>

void foo(int*a)
{
    printf("%p\n", a);  
}
 
int main()
{
    int a[10];
    printf("%p\n", a);  
    foo(a);
}

Answer

address

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Passing arrays as parameters Pass address of first array element``` #include <stdio.h> void foo(int*a) { printf("%p\n", a); } int main() { int a[10]; printf("%p\n", a); foo(a); }

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Flashcard 7657725496588

Question

What does this do?

void free(void* p); // declared in stdlib.h

Answer

Frees memory of passed pointer

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r must take care to free memory Program may run out of memory when repeated allocations are not freed Memory management is source of many errors in C void free(void* p); // declared in stdlib.h Frees memory of passed pointer

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Flashcard 7657727069452

Question

[C] Which function frees the memory of a passed pointer?

Answer

void free(void* p); // declared in stdlib.h

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(malloc) not automatically freed ➜ Programmer must take care to free memory Program may run out of memory when repeated allocations are not freed Memory management is source of many errors in C void free(void* p); // declared in stdlib.h Frees memory of passed pointer

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Flashcard 7657728642316

Question

[C] Where is free() declared?

Answer

stdlib.h

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Programmer must take care to free memory Program may run out of memory when repeated allocations are not freed Memory management is source of many errors in C void free(void* p); // declared in stdlib.h Frees memory of passed pointer

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Flashcard 7657730215180

Question

Is malloc'ed memory automatically freed?

Answer

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Dynamically allocated memory (malloc) not automatically freed ➜ Programmer must take care to free memory Program may run out of memory when repeated allocations are not freed Memory management is source of many errors in C void

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Flashcard 7657756429580

Question

[RISC-V] How many core instruction formats are there?

Answer

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RISC-V instructions: Encoded as 32-bit instruction words Small number of formats encoding operation code (opcode), register numbers, … ➜ 4 core instruction formats (R, I, S, U)

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Flashcard 7657758002444

Question

[RISC-V] The 4 core instruction formats: [...], I, S, U

Answer

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RISC-V instructions: Encoded as 32-bit instruction words Small number of formats encoding operation code (opcode), register numbers, … ➜ 4 core instruction formats (R, I, S, U)

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Flashcard 7657759575308

Question

[RISC-V] The 4 core instruction formats: R, [...], S, U

Answer

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RISC-V instructions: Encoded as 32-bit instruction words Small number of formats encoding operation code (opcode), register numbers, … ➜ 4 core instruction formats (R, I, S, U)

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Flashcard 7657761148172

Question

[RISC-V] The 4 core instruction formats: R, I, [...], U

Answer

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RISC-V instructions: Encoded as 32-bit instruction words Small number of formats encoding operation code (opcode), register numbers, … ➜ 4 core instruction formats (R, I, S, U)

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Flashcard 7657762721036

Question

[RISC-V] The 4 core instruction formats: R, I, S, [...]

Answer

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RISC-V instructions: Encoded as 32-bit instruction words Small number of formats encoding operation code (opcode), register numbers, … ➜ 4 core instruction formats (R, I, S, U)

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Flashcard 7657764293900

Question

How long are RISC-V instruction words?

Answer

32 bit

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RISC-V instructions: Encoded as 32-bit instruction words Small number of formats encoding operation code (opcode), register numbers, … ➜ 4 core instruction formats (R, I, S, U)

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Flashcard 7657765866764

Question

How are RISC-V instructions encoded?

Answer

instruction words

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RISC-V instructions: Encoded as 32-bit instruction words Small number of formats encoding operation code (opcode), register numbers, … ➜ 4 core instruction formats (R, I, S, U)

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Flashcard 7657772420364

Question

What type of programming is required, to make the best use out of Multi- and Manycore processors?

Answer

explicitly parallel programming

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Multi-and manycore processors require explicitly parallel programming

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Flashcard 7657807547660

Question

Which endianness has the most-significant byte at the lowest address?

Answer

Big endian

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RISC-V is little endian §Least-significant byte at least address of a word §Big endian: most-significant byte at least address

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Flashcard 7657809120524

Question

Which Byte is at the lowest address in Big endian?

Answer

most-significant

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RISC-V is little endian §Least-significant byte at least address of a word §Big endian: most-significant byte at least address

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Flashcard 7657810693388

Question

[Big endian] At which address is the most significant byte?

Answer

the lowest address

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RISC-V is little endian §Least-significant byte at least address of a word §Big endian: most-significant byte at least address

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Flashcard 7657812266252

Question

[Little endian] Which byte is at the lowest address of a word?

Answer

Least-significant

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RISC-V is little endian §Least-significant byte at least address of a word §Big endian: most-significant byte at least address

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Flashcard 7657813839116

Question

[Little endian] At which address of a word is the least significant byte?

Answer

least

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RISC-V is little endian §Least-significant byte at least address of a word §Big endian: most-significant byte at least address

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Flashcard 7657815411980

Question

Which endianness is RISC-V?

Answer

little endian

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RISC-V is little endian §Least-significant byte at least address of a word §Big endian: most-significant byte at least address

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Flashcard 7657820654860

Question

Why does physical memory size affect latency?

Answer

because signals have further to travel

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Physical memory size affects latency because Signals have further to travel

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Flashcard 7657823276300

Question

Which bottleneck is also called the von-Neumann-Bottleneck?

Answer

CPU-memory

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CPU-memory bottleneck is also called von-Neumann-Bottleneck

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Question

How is CPU-memory bottleneck also called?

Answer

von-Neumann-Bottleneck

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CPU-memory bottleneck is also called von-Neumann-Bottleneck

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Flashcard 7657833237772

Question

What's the performance a computer is guaranteed not to exceed?

Answer

Peak performance

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Peak performance Performance a computer is guaranteed not to exceed ➜ Not useful for predicting observed performance (can only be upper limit)

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Flashcard 7657881472268

Question

[RISC-V] Procedure call: [...] instruction

jal x1, ProcedureLabel

Answer

jump-and-link

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Procedure call instructions Procedure call: jump-and-link instruction jal x1, ProcedureLabel Executed by caller Puts address of instruction after this one in x1 (ra) (return address) Jumps to target address of ProcedureLabel Procedure return:

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Flashcard 7657883045132

Question

[RISC-V] What is the Jump-and-Link function doing?

Answer

Procedure call

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Flashcard 7657884617996

Question

[RISC-V] Who is Jump-and-Link (jal) executed by?

Answer

the procedure caller

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Flashcard 7657886190860

Question

[RISC-V] Which address is put into the Return address (ra) by Jump-and-Link (jal)?

Answer

the instruction immediately after it

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Question

Which target address does this jump to?

jal x1, ProcedureLabel

Answer

ProcedureLabel

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nstructions Procedure call: jump-and-link instruction jal x1, ProcedureLabel Executed by caller Puts address of instruction after this one in x1 (ra) (return address) Jumps to target address of ProcedureLabel Procedure return: jump-and-link register instruction jalr x0, 0(x1) Executed by callee Like jal, but jumps to 0 + address in x1 (ra) No return address (x0 cannot be changed) Can also be

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Flashcard 7657889336588

Question

What is the jump-and-link register (jalr) instruction procedurally?

Answer

Procedure return

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cedure call: jump-and-link instruction jal x1, ProcedureLabel Executed by caller Puts address of instruction after this one in x1 (ra) (return address) Jumps to target address of ProcedureLabel Procedure return: jump-and-link register instruction jalr x0, 0(x1) Executed by callee Like jal, but jumps to 0 + address in x1 (ra) No return address (x0 cannot be changed) Can also be used for uncondi

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Flashcard 7657890909452

Question

[RISC-V] What's the equivalent instruction to a procedure return?

Answer

jump-and-link register (jalr)

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and-link instruction jal x1, ProcedureLabel Executed by caller Puts address of instruction after this one in x1 (ra) (return address) Jumps to target address of ProcedureLabel Procedure return: jump-and-link register instruction jalr x0, 0(x1) Executed by callee Like jal, but jumps to 0 + address in x1 (ra) No return address (x0 cannot be changed) Can also be used for unconditional jumps </

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Flashcard 7657892482316

Question

Who is jump-and-link register (jalr) executed by?

Answer

called procedure (callee)

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Puts address of instruction after this one in x1 (ra) (return address) Jumps to target address of ProcedureLabel Procedure return: jump-and-link register instruction jalr x0, 0(x1) Executed by callee Like jal, but jumps to 0 + address in x1 (ra) No return address (x0 cannot be changed) Can also be used for unconditional jumps

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Flashcard 7657894055180

Question

Where does this jump to?

jalr x0, 0(x1)

Answer

0 + address in x1 (ra)

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fter this one in x1 (ra) (return address) Jumps to target address of ProcedureLabel Procedure return: jump-and-link register instruction jalr x0, 0(x1) Executed by callee Like jal, but jumps to 0 + address in x1 (ra) No return address (x0 cannot be changed) Can also be used for unconditional jumps

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Flashcard 7657895628044

Question

What's the return address of jump-and-link register (jalr)?

Answer

x0 / zero -> it doesn't have a return address

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) (return address) Jumps to target address of ProcedureLabel Procedure return: jump-and-link register instruction jalr x0, 0(x1) Executed by callee Like jal, but jumps to 0 + address in x1 (ra) No return address (x0 cannot be changed) Can also be used for unconditional jumps

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Flashcard 7657897200908

Question

What can jump-and-link register (jalr) also be used for, if not procedure returns?

Answer

unconditional jumps

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rocedure return: jump-and-link register instruction jalr x0, 0(x1) Executed by callee Like jal, but jumps to 0 + address in x1 (ra) No return address (x0 cannot be changed) Can also be used for unconditional jumps

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Flashcard 7657971911948

Question

Passing arrays as parameters

Pass address of [...]

#include <stdio.h>

void foo(int*a)
{
    printf("%p\n", a);  
}
 
int main()
{
    int a[10];
    printf("%p\n", a);  
    foo(a);
}

Answer

first array element

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Passing arrays as parameters Pass address of first array element``` #include <stdio.h> void foo(int*a) { printf("%p\n", a); } int main() { int a[10]; printf("%p\n", a); foo(a); }

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Flashcard 7657999174924

Question

In which endianness is the least significant byte at the lowest address of a word?

Answer

little endian

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RISC-V is little endian §Least-significant byte at least address of a word §Big endian: most-significant byte at least address

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Flashcard 7658006514956

Question

Which instructions do immediate operands avoid?

Answer

load instructions

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Immediate operands Constant data specified in instruction: addi x22, x22, 4 Make the common case fast: Small constants are common Immediate operand avoids load instruction

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Flashcard 7658008087820

Question

Immediate operands

[...] specified in instruction:

addi x22, x22, 4

Make the common case fast:

Small constants are common

Immediate operand avoids load instruction

Answer

Constant data

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Immediate operands Constant data specified in instruction: addi x22, x22, 4 Make the common case fast: Small constants are common Immediate operand avoids load instruction

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Flashcard 7658009660684

Question

In which operands is constant data specified in the instruction?

Answer

Immediate operands

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Immediate operands Constant data specified in instruction: addi x22, x22, 4 Make the common case fast: Small constants are common Immediate operand avoids load instruction

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Flashcard 7658011495692

Question

Principle of [...]

A program usually accesses small portion of address space at any time (access pattern rather local than wide)

Answer

locality

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Principle of locality A program usually accesses small portion of address space at any time (access pattern rather local than wide)

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Flashcard 7658013068556

Question

Principle of locality A program usually accesses [...] of address space at any time (access pattern rather local than wide)

Answer

small portion

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Principle of locality A program usually accesses small portion of address space at any time (access pattern rather local than wide)

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Flashcard 7658014641420

Question

Principle of locality: A program usually accesses small portion of [...] at any time (access pattern rather local than wide)

Answer

address space

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Principle of locality A program usually accesses small portion of address space at any time (access pattern rather local than wide)

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Flashcard 7658016214284

Question

[...] locality Location is accessed ➜ same location likely to be accessed soon again

Answer

Temporal

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Temporal locality Location is accessed ➜ same location likely to be accessed soon again

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Flashcard 7658017787148

Question

Temporal locality Location is accessed ➜ [...] likely to be accessed soon again

Answer

same location

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Temporal locality Location is accessed ➜ same location likely to be accessed soon again

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Flashcard 7658019360012

Question

Temporal locality Location is accessed ➜ same location likely to be accessed [...]

Answer

soon again

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Temporal locality Location is accessed ➜ same location likely to be accessed soon again

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Flashcard 7658020932876

Question

How to reduce [...]?

Solution: Increase cache size

Positive:

more blocks in cache

Negatives:

Hit time might increase (wire delays)
-> L1 caches grow slowly, if at all

Answer

capacity misses

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How to reduce capacity misses? Solution: Increase cache size Positive: more blocks in cache Negatives: Hit time might increase (wire delays) -> L1 caches grow slowly, if at all

Original toplevel document (pdf)

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Flashcard 7658022505740

Question

How to reduce capacity misses?

Solution: [...]

Positive:

more blocks in cache

Negatives:

Hit time might increase (wire delays)
-> L1 caches grow slowly, if at all

Answer

Increase cache size

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How to reduce capacity misses? Solution: Increase cache size Positive: more blocks in cache Negatives: Hit time might increase (wire delays) -> L1 caches grow slowly, if at all

Original toplevel document (pdf)

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Flashcard 7658024078604

Question

How to reduce capacity misses?

Solution: Increase cache size

Positive:

more blocks in cache

Negatives:

[...]
-> L1 caches grow slowly, if at all

Answer

Hit time might increase (wire delays)

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How to reduce capacity misses? Solution: Increase cache size Positive: more blocks in cache Negatives: Hit time might increase (wire delays) -> L1 caches grow slowly, if at all

Original toplevel document (pdf)

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Flashcard 7658025651468

Question

How to reduce capacity misses?

Solution: Increase cache size

Positive:

[...]

Negatives:

Hit time might increase (wire delays)
-> L1 caches grow slowly, if at all

Answer

more blocks in cache

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How to reduce capacity misses? Solution: Increase cache size Positive: more blocks in cache Negatives: Hit time might increase (wire delays) -> L1 caches grow slowly, if at all

Original toplevel document (pdf)

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Flashcard 7658027224332

Question

[RISC] Operating on memory data requires [...] ➜ More instructions to execute

Answer

loads and stores

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[RISC] Operating on memory data requires loads and stores ➜ More instructions to execute

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Flashcard 7658028797196

Question

[RISC] Operating on memory data requires loads and stores ➜ [...] instructions to execute

Answer

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[RISC] Operating on memory data requires loads and stores ➜ More instructions to execute

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Flashcard 7658030370060

Question

Block replacement strategies

Choice of entry to replace on a miss:

[...]

Answer

Least recently used (LRU)

Complex and costly hardware for high associativity

Pseudo-least recently used (PLRU)

Random

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Block replacement strategies Choice of entry to replace on a miss: Least recently used (LRU) Complex and costly hardware for high associativity Pseudo-least recently used (PLRU) Random

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Flashcard 7658031942924

Question

Conflict miss (collision miss)

In [...] cache only
Miss eliminated in fully-associative cache of same size as direct-mapped/set-associative cache

Answer

direct-mapped or set-associative

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Conflict miss (collision miss) In direct-mapped or set-associative cache only Miss eliminated in fully-associative cache of same size as direct-mapped/set-associative cache

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Flashcard 7658062875916

Question

How to reduce compulsory misses?

Solutions: Increase block size

Positive:

Every block contains more data
-> Better exploit [...] locality

Negative:

Fewer but larger blocks
Conflict misses might increase
Capacity misses might increase

Answer

spatial

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How to reduce compulsory misses? Solutions: Increase block size Positive: Every block contains more data -> Better exploit spatial locality Negative: Fewer but larger blocks Conflict misses might increase Capacity misses might increase

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Flashcard 7658064448780

Question

How to reduce compulsory misses?

Solutions: [...]

Positive:

Every block contains more data
-> Better exploit spatial locality

Negative:

Fewer but larger blocks
Conflict misses might increase
Capacity misses might increase

Answer

Increase block size

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Original toplevel document (pdf)

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Flashcard 7658066021644

Question

How to reduce [...]?

Solutions: Increase block size

Positive:

Every block contains more data
-> Better exploit spatial locality

Negative:

Fewer but larger blocks
Conflict misses might increase
Capacity misses might increase

Answer

compulsory misses

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Flashcard 7658067594508

Question

What's the downside of larger Cache blocks?

Answer

there’s most likely fewer of them

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Original toplevel document (pdf)

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Flashcard 7658069167372

Question

How to reduce compulsory misses?

Solutions: Increase block size

Positive:

Every block contains more data
-> Better exploit spatial locality

Negative:

Fewer but larger blocks
[...] might increase
Capacity misses might increase

Answer

Conflict misses

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Original toplevel document (pdf)

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Flashcard 7658070740236

Question

How to reduce compulsory misses?

Solutions: Increase block size

Positive:

Every block contains more data
-> Better exploit spatial locality

Negative:

Fewer but larger blocks
Conflict misses might increase
[...] might increase

Answer

Capacity misses

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compulsory misses? Solutions: Increase block size Positive: Every block contains more data -> Better exploit spatial locality Negative: Fewer but larger blocks Conflict misses might increase Capacity misses might increase

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Flashcard 7658072313100

Question

How is the compulsory miss also called?

Answer

cold-start miss

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Compulsory miss (cold-start miss) Miss on very first access to a block which was never in cache before

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Flashcard 7658073885964

Question

When do compulsory misses happen?

Answer

when a block is accessed for the first time

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Compulsory miss (cold-start miss) Miss on very first access to a block which was never in cache before

Original toplevel document (pdf)

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Flashcard 7658076769548

Question

Procedure / function calling

[...]
Transfer control to procedure (jal ra, Proc)
Acquire storage for procedure (addi sp, sp, -…)
Perform procedure's operations
Place result in register a0 for caller
Free storage of procedure (addi sp, sp, +…)
Return to place of call (jalr zero, 0(ra))

Answer

Place parameters in registers a0 to a7

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Procedure / function calling Place parameters in registers a0 to a7 Transfer control to procedure (jal ra, Proc) Acquire storage for procedure (addi sp, sp, -…) Perform procedure's operations Place result in register a0 for caller Free storage of proced

Flashcard 7658078342412

Question

Procedure / function calling

Place parameters in registers [...]
Transfer control to procedure (jal ra, Proc)
Acquire storage for procedure (addi sp, sp, -…)
Perform procedure's operations
Place result in register a0 for caller
Free storage of procedure (addi sp, sp, +…)
Return to place of call (jalr zero, 0(ra))

Answer

a0 to a7

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Flashcard 7658079915276

Question

Procedure / function calling

Place parameters in registers a0 to a7
[...]
Acquire storage for procedure (addi sp, sp, -…)
Perform procedure's operations
Place result in register a0 for caller
Free storage of procedure (addi sp, sp, +…)
Return to place of call (jalr zero, 0(ra))

Answer

Transfer control to procedure (jal ra, Proc)

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Flashcard 7658081488140

Question

Procedure / function calling

Place parameters in registers a0 to a7
Transfer control to procedure ([...])
Acquire storage for procedure (addi sp, sp, -…)
Perform procedure's operations
Place result in register a0 for caller
Free storage of procedure (addi sp, sp, +…)
Return to place of call (jalr zero, 0(ra))

Answer

jal ra, Proc

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Flashcard 7658083061004

Question

Procedure / function calling

Place parameters in registers a0 to a7
Transfer control to procedure (jal ra, Proc)
[...]
Perform procedure's operations
Place result in register a0 for caller
Free storage of procedure (addi sp, sp, +…)
Return to place of call (jalr zero, 0(ra))

Answer

Acquire storage for procedure (addi sp, sp, -…)

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Flashcard 7658084633868

Question

Procedure / function calling

Place parameters in registers a0 to a7
Transfer control to procedure (jal ra, Proc)
Acquire storage for procedure ([...]
Perform procedure's operations
Place result in register a0 for caller
Free storage of procedure (addi sp, sp, +…)
Return to place of call (jalr zero, 0(ra))

Answer

addi sp, sp, -…)

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Flashcard 7658086206732

Question

Procedure / function calling

Place parameters in registers a0 to a7
Transfer control to procedure (jal ra, Proc)
Acquire storage for procedure (addi sp, sp, -…)
[...]
Place result in register a0 for caller
Free storage of procedure (addi sp, sp, +…)
Return to place of call (jalr zero, 0(ra))

Answer

Perform procedure's operations

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Flashcard 7658087779596

Question

Procedure / function calling

Place parameters in registers a0 to a7
Transfer control to procedure (jal ra, Proc)
Acquire storage for procedure (addi sp, sp, -…)
Perform procedure's operations
[...]
Free storage of procedure (addi sp, sp, +…)
Return to place of call (jalr zero, 0(ra))

Answer

Place result in register a0 for caller

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Open it
> Procedure / function calling Place parameters in registers a0 to a7 Transfer control to procedure (jal ra, Proc) Acquire storage for procedure (addi sp, sp, -…) Perform procedure's operations Place result in register a0 for caller Free storage of procedure (addi sp, sp, +…) Return to place of call (jalr zero, 0(ra))

Flashcard 7658089352460

Question

Procedure / function calling

Place parameters in registers a0 to a7
Transfer control to procedure (jal ra, Proc)
Acquire storage for procedure (addi sp, sp, -…)
Perform procedure's operations
Place result in register [...] for caller
Free storage of procedure (addi sp, sp, +…)
Return to place of call (jalr zero, 0(ra))

Answer

a0

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lling Place parameters in registers a0 to a7 Transfer control to procedure (jal ra, Proc) Acquire storage for procedure (addi sp, sp, -…) Perform procedure's operations Place result in register a0 for caller Free storage of procedure (addi sp, sp, +…) Return to place of call (jalr zero, 0(ra))

Flashcard 7658090925324

Question

Procedure / function calling

Place parameters in registers a0 to a7
Transfer control to procedure (jal ra, Proc)
Acquire storage for procedure (addi sp, sp, -…)
Perform procedure's operations
Place result in register a0 for caller
[...]
Return to place of call (jalr zero, 0(ra))

Answer

Free storage of procedure (addi sp, sp, +…)

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rameters in registers a0 to a7 Transfer control to procedure (jal ra, Proc) Acquire storage for procedure (addi sp, sp, -…) Perform procedure's operations Place result in register a0 for caller Free storage of procedure (addi sp, sp, +…) Return to place of call (jalr zero, 0(ra))

Flashcard 7658092498188

Question

Procedure / function calling

Place parameters in registers a0 to a7
Transfer control to procedure (jal ra, Proc)
Acquire storage for procedure (addi sp, sp, -…)
Perform procedure's operations
Place result in register a0 for caller
Free storage of procedure (addi sp, sp, +…)
[...]

Answer

Return to place of call (jalr zero, 0(ra))

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rol to procedure (jal ra, Proc) Acquire storage for procedure (addi sp, sp, -…) Perform procedure's operations Place result in register a0 for caller Free storage of procedure (addi sp, sp, +…) Return to place of call (jalr zero, 0(ra))

Flashcard 7658094071052

Question

Procedure / function calling

Place parameters in registers a0 to a7
Transfer control to procedure (jal ra, Proc)
Acquire storage for procedure (addi sp, sp, -…)
Perform procedure's operations
Place result in register a0 for caller
Free storage of procedure (addi sp, sp, +…)
Return to place of call ([...]

Answer

jalr zero, 0(ra))

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Proc) Acquire storage for procedure (addi sp, sp, -…) Perform procedure's operations Place result in register a0 for caller Free storage of procedure (addi sp, sp, +…) Return to place of call (jalr zero, 0(ra))

Flashcard 7658095643916

Question

3 metrics of cache performance optimization

[...]
- Higher associativity ✅
- Larger cache size ✅
- Larger block size ✅
- + Software optimization
Reducing the miss penalty
- Multilevel caches
Reducing the hit time
- Small and simple caches ✅

Answer

Reducing the miss rate

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3 metrics of cache performance optimization Reducing the miss rate Higher associativity ✅ Larger cache size ✅ Larger block size ✅ + Software optimization Reducing the miss penalty Multilevel caches Reducing the hit time Small and simple caches ✅

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Flashcard 7658097216780

Question

3 metrics of cache performance optimization

Reducing the miss rate
- Higher associativity ✅
- Larger cache size ✅
- Larger block size ✅
- + Software optimization
[...]
- Multilevel caches
Reducing the hit time
- Small and simple caches ✅

Answer

Reducing the miss penalty

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Original toplevel document (pdf)

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Flashcard 7658098789644

Question

3 metrics of cache performance optimization

Reducing the miss rate
- Higher associativity ✅
- Larger cache size ✅
- Larger block size ✅
- + Software optimization
Reducing the miss penalty
- Multilevel caches
[...]
- Small and simple caches ✅

Answer

Reducing the hit time

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trics of cache performance optimization Reducing the miss rate Higher associativity ✅ Larger cache size ✅ Larger block size ✅ + Software optimization Reducing the miss penalty Multilevel caches Reducing the hit time Small and simple caches ✅

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Flashcard 7658106391820

Question

The called procedure saves [...] registers from the caller procedure if it wants to use them.

Answer

the Saved

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Flashcard 7658107964684

Question

The called procedure saves the Saved registers from [...] if it wants to use them.

Answer

the caller procedure

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The called procedure saves the Saved registers from the caller procedure if it wants to use them. The called procedure saves the Saved registers to the stack. The called procedure must load the Saved registers from the caller procedure before returning. The

Original toplevel document (pdf)

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Flashcard 7658109537548

Question

The called procedure saves the Saved registers to [...].

Answer

the stack

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Flashcard 7658111110412

Question

The called procedure must load the [...] saved registers before returning.

Answer

caller procedure's

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saves the Saved registers from the caller procedure if it wants to use them. The called procedure saves the Saved registers to the stack. The called procedure must load the Saved registers from the caller procedure before returning. The called procedure loads the Saved registers from the stack. The Saved registers are (s0-s11).

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Flashcard 7658112683276

Question

The called procedure must load the Saved registers from the caller procedure before [...].

Answer

returning

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om the caller procedure if it wants to use them. The called procedure saves the Saved registers to the stack. The called procedure must load the Saved registers from the caller procedure before returning. The called procedure loads the Saved registers from the stack. The Saved registers are (s0-s11).

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Flashcard 7658114256140

Question

The called procedure must [...] the Saved registers from the caller procedure before returning.

Answer

load

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n> The called procedure saves the Saved registers from the caller procedure if it wants to use them. The called procedure saves the Saved registers to the stack. The called procedure must load the Saved registers from the caller procedure before returning. The called procedure loads the Saved registers from the stack. The Saved registers are (s0-s11).

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Flashcard 7658115829004

Question

Which registers are the saved registers?

Answer

(s0-s11)

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the stack. The called procedure must load the Saved registers from the caller procedure before returning. The called procedure loads the Saved registers from the stack. The Saved registers are (s0-s11).

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Flashcard 7658117401868

Question

How are registers s0 to s11 called?

Answer

the saved registers

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s the Saved registers to the stack. The called procedure must load the Saved registers from the caller procedure before returning. The called procedure loads the Saved registers from the stack. The Saved registers are (s0-s11).

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Flashcard 7658118974732

Question

The called procedure loads the saved registers from [...].

Answer

the stack

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cedure saves the Saved registers to the stack. The called procedure must load the Saved registers from the caller procedure before returning. The called procedure loads the Saved registers from the stack. The Saved registers are (s0-s11).

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Flashcard 7658120547596

Question

The called procedure [...] the Saved registers from the stack.

Answer

loads

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nts to use them. The called procedure saves the Saved registers to the stack. The called procedure must load the Saved registers from the caller procedure before returning. The called procedure loads the Saved registers from the stack. The Saved registers are (s0-s11).

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Flashcard 7658143616268

Question

Computer [...] depends on workload

Answer

performance

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Computer performance depends on workload

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Flashcard 7658145189132

Question

For nested call, caller needs to save on stack:

[...]
Any arguments and temporaries needed after the call

Answer

Its own return address

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For nested call, caller needs to save on stack: Its own return address Any arguments and temporaries needed after the call

Original toplevel document (pdf)

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Flashcard 7658146761996

Question

For nested call, caller needs to save on stack:

Its own return address
[...] needed after the call

Answer

Any arguments and temporaries

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For nested call, caller needs to save on stack: Its own return address Any arguments and temporaries needed after the call

Original toplevel document (pdf)

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Flashcard 7658148334860

Question

For [...] call, caller needs to save on stack:

Its own return address
Any arguments and temporaries needed after the call

Answer

nested

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For nested call, caller needs to save on stack: Its own return address Any arguments and temporaries needed after the call

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Flashcard 7658149907724

Question

For nested call, [...] needs to save on stack:

Its own return address
Any arguments and temporaries needed after the call

Answer

caller

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For nested call, caller needs to save on stack: Its own return address Any arguments and temporaries needed after the call

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Question

Caches exploit [...] locality by remembering contents of recently accessed locations

Answer

temporal

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Caches exploit temporal locality by remembering contents of recently accessed locations Caches exploit spatial locality by fetching data around recently accessed locations

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Question

Caches exploit [...] locality by fetching data around recently accessed locations

Answer

spatial

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Caches exploit temporal locality by remembering contents of recently accessed locations Caches exploit spatial locality by fetching data around recently accessed locations

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Question

Caches exploit spatial locality by [...] recently accessed locations

Answer

fetching data around

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Caches exploit temporal locality by remembering contents of recently accessed locations Caches exploit spatial locality by fetching data around recently accessed locations

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Question

Caches exploit temporal locality by [...] recently accessed locations

Answer

remembering contents of

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Caches exploit temporal locality by remembering contents of recently accessed locations Caches exploit spatial locality by fetching data around recently accessed locations

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Tags

#has-images

Question

What type of cache is this?

Answer

Direct-mapped Cache

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Flashcard 7658171141388

Question

How to reduce [...]?

Solution: Increase associativity

Positive:

Less collisions

Negatives:

Critical path for access might become longer (selection of block)
→ Hit time might increase

Answer

conflict misses

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How to reduce conflict misses? Solution: Increase associativity Positive: Less collisions Negatives: Critical path for access might become longer (selection of block) → Hit time might increase

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Flashcard 7658172714252

Question

How to reduce conflict misses?

Solution: [...]

Positive:

Less collisions

Negatives:

Critical path for access might become longer (selection of block)
→ Hit time might increase

Answer

Increase associativity

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Question

How to reduce conflict misses?

Solution: Increase associativity

Positive:

[...]

Negatives:

Critical path for access might become longer (selection of block)
→ Hit time might increase

Answer

Less collisions

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Question

How to reduce conflict misses?

Solution: Increase associativity

Positive:

Less collisions

Negatives:

Critical path for access might become longer (selection of block)
→ [...]

Answer

Hit time might increase

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Question

[...] locality Location is accessed ➜ nearby locations likely to be accessed soon again

Answer

Spatial

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Spatial locality Location is accessed ➜ nearby locations likely to be accessed soon again

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Question

Spatial locality Location is accessed ➜ [...] likely to be accessed soon again

Answer

nearby locations

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Spatial locality Location is accessed ➜ nearby locations likely to be accessed soon again

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Question

3 types of cache misses (3 Cs)

[...] miss
Capacity miss
Conflict miss

Answer

Compulsory

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3 types of cache misses (3 Cs) Compulsory miss Capacity miss Conflict miss

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Question

3 types of cache misses (3 Cs)

Compulsory miss
[...] miss
Conflict miss

Answer

Capacity

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3 types of cache misses (3 Cs) Compulsory miss Capacity miss Conflict miss

Flashcard 7658184510732

Question

3 types of cache misses (3 Cs)

Compulsory miss
Capacity miss
[...] miss

Answer

Conflict

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3 types of cache misses (3 Cs) Compulsory miss Capacity miss Conflict miss

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Question

[C] What operator is.?

Answer

member access operator

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member access operator .

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Question

[C] What's the member access operator?

Answer

.

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Question

How do you close the performance gap between CPU and memory?

Answer

Caches

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Tags

#has-images

Question

What kind of cache is this?

Answer

set-associative cache

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Question

Tags and valid bits

How to know which memory block is stored in which cache block?

Store block data and block address

Only need [...] bits: tag

What if no data in a cache block?

Valid bit: 1 = present, 0 = not present

Initially 0

Answer

high-order

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Tags and valid bits How to know which memory block is stored in which cache block? Store block data and block address Only need high-order bits: tag What if no data in a cache block? Valid bit: 1 = present, 0 = not present Initially 0

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Question

Tags and valid bits

How to know which memory block is stored in which cache block?

Store block data and block address

Only need high-order bits: tag

What if no data in a cache block?

[...]: 1 = present, 0 = not present

Initially 0

Answer

Valid bit

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pan> Tags and valid bits How to know which memory block is stored in which cache block? Store block data and block address Only need high-order bits: tag What if no data in a cache block? Valid bit: 1 = present, 0 = not present Initially 0

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Question

Variable declaration of a struct
struct point a;

Variable declaration with initialization
[...]

Answer

struct point b= {1, 2};

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Variable declaration of a struct struct point a; Variable declaration with initialization struct point b= {1, 2};

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Question

Variable declaration of a struct
[...]

Variable declaration with initialization
struct point b= {1, 2};

Answer

struct point a;

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Variable declaration of a struct struct point a; Variable declaration with initialization struct point b= {1, 2};

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Edited, memorised or added to reading queue

on 22-Sep-2024 (Sun)

Procedure / function calling

3 types of cache misses (3 Cs)

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Passing arrays as parameters

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